Logic gates
Logic gates, Boolean Algebra
Boolean Laws
K-MAP Simplification
K-MAP Simplification
3, 4 variable K-Map simplification
K-Map with Don't care
5 variable K-Map, POS simplification, Intro to Q-M method
QM method, PI/EPI
NAND/NOR implementation
Digital logic families
Logic families and special codes
Logic families continued
Unit II- Half adder, full adder
RCA, Binary subtractor
CLA adder, MUX
BCD adder, Multiplexer
De-MUX, Applications of MUX, Comparator
Multiplier
Magnitude comparator, Decoder
Decoder/Encoder
BCD-7 Segment decoder, Priority encoder
Code conversion
Verilog Programming Intro
Verilog programming -- Intro to Sequential circuit
III Unit----Sequential circuit
SR latch and F/F
D,JK F/F
Additional F/F's
T F/F
Conversion of one F/F to other F/F
Shift registers
Shift Register
Asynchronous counters
Down counter, Up/Down counter
Counter--continued
counter contd
Unit4: Verilog Basics
Verilog Programming
Verilog Unit 4
Adder programming
